为了提高数字接收机的测频精度,文中在分析Rife算法性能的基础上,提出了一种改进的Rife测频算法,并对该算法的原理和FPGA实现步骤进行了详细说明。仿真结果表明,在相同的信噪比条件下,该算法的测频误差小于Rife算法。同时,为了提高算法的运算速度,在利用FPGA实现时,将对数运算利用查找表方法实现,采用减法操作替代除法运算,使测频速度高达240MHz。最终实测结果验证了算法的有效性。

In order to improve the frequency measurement precision of digital receiver, an improved Rife frequency measurement algorithm was proposed base on the performance analysis of the Rife algorithm, and the principle of the algorithm and FPGA implementation steps were described in detail. The simulation results show that under the same signal to noise ratio (SNR), the improved Rife algorithm's error is less than that of the Rife algorithm. Meanwhile, in order to improve the operation speed, the look-up table in FPGA is used to achieve the logarithm operation and replace division by subtraction to make the frequency measurement speeds up to 240MHz. The experiment results demonstrate the effectiveness of the algorithm.